Hardware Pong Implementation

Designed, tested, and implemented the Atari Pong game in SystemVerilog and synthesized the design onto a Spartan 7 Xilinx FPGA for the 18-240 class (Structure and Design of Digital Systems).

• Implemented an Atari-style Pong game in SystemVerilog on an AMD Spartan™ 7 FPGA
• Designed hardware logic for game-state control, paddle/ball movement, collision detection, and score tracking.
• Verified core logic with simulation testbenches through VCS and waveform debugging before hardware bring-up.
• Synthesized & deployed the design with Vivado to drive real-time gameplay output on a 800x600 VGA monitor @ 40 MHz.